IcosaLogic Inverter Designer

Configurations

Current Config

cur_cfg

ⓘ

Enter name for new config

new_cfg

ⓘ

Purge All Configs

cfg_purge

ⓘ

Basics

Output Frequency

f_out

ⓘ

Output Frequency Omega

ω_out

ⓘ

Skin depth at f_out

d_{skin_out}

ⓘ

Control Type

ctrl_type

ⓘ

Switching Frequency

f_sw

ⓘ

Switching Frequency Effective

f_{sw_eff}

ⓘ

Switching Frequency Omega

ω_sw

ⓘ

Switching Cycle Time

t_sw

ⓘ

Skin depth at f_sw

d_{skin_sw}

ⓘ

Output Current

I_out

ⓘ

Output Voltage

V_rms

V RMS

ⓘ

Output Voltage (peak-to-peak)

V_pp

ⓘ

Number of Lines

lines

ⓘ

Output Power

P_out

ⓘ

Estimated Efficiency

η_est

ⓘ

Min

Nominal

Max

Input Current Per Line

I_{in_line}

ⓘ

Input Current

I_in

ⓘ

Battery

Min

Nominal

Max

Cell Voltage

V_cell

ⓘ

Series

bat_series

cells

ⓘ

Pack Voltage

V_pack

ⓘ

Bus Configuration

Bus type

bus_type

ⓘ

Conductor current density

J_cond

A/mm²

ⓘ

Wire part number

wire_pn

ⓘ

Wire gauge

AWG

gauge

ⓘ

Number of strands

strands

ⓘ

Strand Diameter

strand_dia

ⓘ

Wire Diameter

wire_dia

ⓘ

Switching Current Capacity

I_{wire_sw}

ⓘ

Output Current Capacity

I_{wire_out}

ⓘ

Switching Resistance

R_{wire_sw}

mΩ / m

ⓘ

Output Resistance

R_{wire_out}

mΩ / m

ⓘ

CU thickness recommend

d_{CU recommend}

ⓘ

Use recommend

use_cu_recommend

ⓘ

CU thickness actual

d_{CU actual}

ⓘ

Min current path width

min_cond_width

ⓘ

Num CU layers required

cu_layers

ⓘ

Current Capacity (Switch)

I_bb

ⓘ

Current Capacity (Out)

I_{bb_out}

ⓘ

Substrate thickness

d_substrate

ⓘ

Inter-layer dielectric thickness

d_ild

ⓘ

Total bus bar thickness

d_total

ⓘ

DC Link Capacitor

Input DC to RMS Current

dcl_dc_rms_factor

ⓘ

Max RMS Input Current

dcl_i_rms_max

ⓘ

Input Ripple

dcl_v_ripple

ⓘ

Input Ripple Impedance

dcl_z_ripple

Ω

ⓘ

Capacitance Required

C_required

µF

ⓘ

Figure of Merit

FoM

*10⁶

ⓘ

Cap Part Number

dcl_cap_pn

ⓘ

Manufacturer

dcl_mfg

ⓘ

Tech

dcl_tech

ⓘ

Capacitance

C_dcl

µF

ⓘ

Max DC Voltage

V_{dcl_dc}

ⓘ

Current RMS

I_{dcl_rms}

ⓘ

Equivalent Series Inductance

ESL_dcl

ⓘ

Equivalent Series Resistance

ESR_dcl

mΩ

ⓘ

Thermal Resistance Core To Case

R_{dcl_θ_cc}

°C / W

ⓘ

Thermal Resistance Case To Ambient

R_{dcl_θ_ca}

°C / W

ⓘ

Number of Caps

dcl_count

ⓘ

Capacitor FoM

FoM_cap

*10⁶

ⓘ

Total Figure of Merit

FoM_total

*10⁶

ⓘ

Total DCL Current

I_{dcl_total}

ⓘ

Total DCL Capacitance

C_{dcl_total}

µF

ⓘ

FET

Number of FETs

fet_count

ⓘ

FET part number

fet_pn

ⓘ

FET Manufacturer

fet_mfg

ⓘ

Technology

fet_tech

ⓘ

Package

fet_pkg

ⓘ

FET Count per Half Bridge

fet_nhb

ⓘ

Voltage

V_{fet_max}

ⓘ

Max Current

I_{fet_max}

ⓘ

Max Current (Hot)

I_{fet_max_hot}

ⓘ

On Resistance

R_{ds_on}

Ω

ⓘ

On Resistance (Effective)

R_{ds_on_eff}

Ω

ⓘ

Total Gate Charge

Q_g

ⓘ

Turn on delay

t_d(on)

ⓘ

V_gs Rise time

t_{gs_rise}

ⓘ

Turn off delay

t_d(off)

ⓘ

V_gs Fall time

t_{gs_fall}

ⓘ

Theta Junction to Case

R_{θ_jc}

°C / W

ⓘ

Gate External Resistance

R_{g_ext}

Ω

ⓘ

Gate Internal Resistance

R_{g_int}

Ω

ⓘ

Gate On Voltage

V_{g_on}

ⓘ

Gate Off Voltage

V_{g_off}

ⓘ

Input Capacitance

C_iss

ⓘ

Output Capacitance

C_oss

ⓘ

Reverse Transfer Capacitance

C_rss

ⓘ

Energy to Switch On

E_on

ⓘ

Energy to Switch Off

E_off

ⓘ

Energy Measurement Voltage

V_swe

ⓘ

Dead time

t_dead

ⓘ

Max Current (Actual)

I_{fet_max_actual}

ⓘ

Heat Sink Theta Case to Ambient

R_{θ_ca}

°C / W

ⓘ

Gate Driver

External Gate On Resistance

R_{g_ext_on}

Ω

ⓘ

External Gate On Resistance

R_{g_ext_off}

Ω

ⓘ

FET Switching Hardness

gd_sw_hard

ⓘ

Gate Driver On Resistance

R_{gd_on}

Ω

ⓘ

Gate Driver Off Resistance

R_{gd_off}

Ω

ⓘ

Est Turn On Current

I_{gd_on}

ⓘ

Est Turn Off Current

I_{gd_off}

ⓘ

Turn On Duty Cycle

gd_dc_on

ⓘ

Turn Off Duty Cycle

gd_dc_off

ⓘ

Avg Gate Driver Current

I_{gd_avg}

ⓘ

Avg Gate Driver Power

P_{gd_avg}

ⓘ

Bootstrap Diode Forward Voltage

V_{f_bs}

ⓘ

Bootstrap Capacitor Factor

gd_bs_cf

ⓘ

Bootstrap Capacitor

C_bs

ⓘ

Bootstrap Resistor

R_bs

Ω

ⓘ

Bootstrap RC Time Constant

τ_bs

ⓘ

Bootstrap Energy

E_bs

ⓘ

VDD Capacitor

C_vdd

µF

ⓘ

Output Filter

Inductor Saturation Headroom

%_{sat_hr}

ⓘ

Inductor Saturation Headroom

I_{sat_hr}

ⓘ

Max Grid Inductance

L_{grid_max}

ⓘ

Filter Type

of_type

ⓘ

Min

Max

Frequency Range 5 Octave

f_{lc_min5}

kHz

ⓘ

Frequency Range 6 Octave

f_{lc_min6}

kHz

ⓘ

Current

Stable

Max

Suggestion Number

n_suggested

ⓘ

Suggested Inductance 1

L_{1_suggested}

µH

ⓘ

Suggested Capacitance

C_suggested

µF

ⓘ

Suggested Inductance 2

L_{2_suggested}

µH

ⓘ

Suggested Delta

δ_suggested

ⓘ

Suggested Filter Frequency

f_{res_sugg}

kHz

ⓘ

Unloaded

Loaded

Actual Filter Frequency

f_{res_actual}

kHz

ⓘ

Damping Resistor

R_damping

ⓘ

Inductor 1

Inductor type

ind1_type

ⓘ

Part Number

ind1_pn

ⓘ

Manufacturer

ind1_mfg

ⓘ

Inductance

L_ind1

ⓘ

Typical DC Resistance

R_{ind1_dc_typ}

mΩ

ⓘ

Max DC Resistance

R_{ind1_dc_max}

mΩ

ⓘ

DC Current (40°C Δt)

I_{ind1_dt40}

ⓘ

DC Current (100°C Δt)

I_{ind1_dt100}

ⓘ

DC Saturation Current (20% ΔH)

I_{ind1_sat20}

ⓘ

DC Saturation Current (30% ΔH)

I_{ind1_sat30}

ⓘ

Target Inductance

L_{1_target}

µH

ⓘ

Radius selection

ind1_radius_sel

ⓘ

Energy Stored

LI²

mH A²

ⓘ

Target area product

A_{p_target}

ⓘ

Part Number

ind1_core_pn

ⓘ

Manufacturer

ind1_core_mfg

ⓘ

Material

ind1_mat

ⓘ

Relative permeability

µ₁

ⓘ

Area product

A_p

cm⁴

ⓘ

Outside Diameter

ind1_od

ⓘ

Inside Diameter

ind1_id

ⓘ

Height

ind1_ht

ⓘ

Max Turns

ind1_turns_max

ⓘ

Max Turns Layer 1

ind1_turns_l1

ⓘ

Max Turns OD Layer 1

ind1_turns_l1_od

ⓘ

Turns

ind1_turns

ⓘ

Winding Factor

ind1_winding_factor

ⓘ

Outside Diameter Wound

ind1_od_wound

ⓘ

Inside Diameter Wound

ind1_id_wound

ⓘ

Height Wound

ind1_ht_wound

ⓘ

Unloaded

Loaded

Turns factor

A_l

nH / turns²

ⓘ

Core Radius

r_{ind1_core}

ⓘ

Length

ind1_len

ⓘ

Winding length

ind1_winding_len

ⓘ

Volume

ind1_vol

cm³

in³

ⓘ

Wound area

ind1_wound_area

cm²

in²

ⓘ

Inductance

L_ind

µH

ⓘ

Number of Inductors

ind1_count

ⓘ

Total Inductance

L_total

µH

ⓘ

Min

Nominal

Max

Current Delta

di/dt

A/µs

ⓘ

Output Capacitor

Target Capacitance

C_target

µF

ⓘ

Cap Part Number

oc_pn

ⓘ

Manufacturer

oc_mfg

ⓘ

Tech

oc_tech

ⓘ

Capacitance

C_oc

µF

ⓘ

Voltage

V_{oc_dc}

ⓘ

Current RMS

I_{oc_rms}

ⓘ

Equivalent Series Inductance

ESL_oc

ⓘ

Equivalent Series Resistance

ESR_oc

mΩ

ⓘ

Thermal Resistance Core To Case

R_{oc_θ_cc}

°C / W

ⓘ

Thermal Resistance Case To Ambient

R_{oc_θ_ca}

°C / W

ⓘ

Number of Caps

oc_count

ⓘ

Total Capacitance

C_{oc_total}

µF

ⓘ

Inductor 2

Inductor type

ind2_type

ⓘ

Part Number

ind2_pn

ⓘ

Manufacturer

ind2_mfg

ⓘ

Inductance

L_ind2

ⓘ

Typical DC Resistance

R_{ind2_dc_typ}

mΩ

ⓘ

Max DC Resistance

R_{ind2_dc_max}

mΩ

ⓘ

DC Current (40°C Δt)

I_{ind2_dt40}

ⓘ

DC Current (100°C Δt)

I_{ind2_dt100}

ⓘ

DC Saturation Current (20% ΔH)

I_{ind2_sat20}

ⓘ

DC Saturation Current (30% ΔH)

I_{ind2_sat30}

ⓘ

Target Inductance

L_{2_target}

µH

ⓘ

Radius selection

ind2_radius_sel

ⓘ

Energy Stored

LI²

mH A²

ⓘ

Target area product

A_{p_target}

m⁴

ⓘ

Part Number

ind2_core_pn

ⓘ

Manufacturer

ind2_core_mfg

ⓘ

Material

ind2_mat

ⓘ

Relative permeability

µ₂

ⓘ

Area product

A_p

cm⁴

ⓘ

Outside Diameter

ind2_od

ⓘ

Inside Diameter

ind2_id

ⓘ

Height

ind2_ht

ⓘ

Max Turns

ind2_turns_max

ⓘ

Max Turns Layer 1

ind2_turns_l1

ⓘ

Max Turns OD Layer 1

ind2_turns_l1_od

ⓘ

Turns

ind2_turns

ⓘ

Winding Factor

ind2_winding_factor

ⓘ

Outside Diameter Wound

ind2_od_wound

ⓘ

Inside Diameter Wound

ind2_id_wound

ⓘ

Height Wound

ind2_ht_wound

ⓘ

Unloaded

Loaded

Turns factor

A_l

nH / turns²

ⓘ

Inductance

L_ind

µH

ⓘ

Core Radius

r_{ind2_core}

ⓘ

Length

ind2_len

ⓘ

Winding length

ind2_winding_len

ⓘ

Volume

ind2_vol

cm³

in³

ⓘ

Wound area

ind2_wound_area

cm²

in²

ⓘ

Number of Inductors

ind2_count

ⓘ

Total Inductance

L_total

µH

ⓘ

Thermal

Ambient Temperature

t_ambient

°C

ⓘ

DC-Link Cap Power

P_dcl

ⓘ

DC-Link Cap Core Temp

t_{dcl_core}

°C

ⓘ

Gate Driver Switching Power

P_gsd

ⓘ

Gate Ext Resistor Power

P_rgext

ⓘ

Gate Int Resistor Power

P_rgint

ⓘ

FET Current Power

P_fi

ⓘ

FET Switching Power

P_fsw

ⓘ

FET Junction Temp Q1/Q2

t_{fet_j}

°C

ⓘ

FET Junction Temp Q3/Q4

t_{fet_j}

°C

ⓘ

Inductor1 Power

P_ind1

ⓘ

Inductor1 Core Temp

t_{ind1_core}

°C

ⓘ

Output Cap Power

P_oc

ⓘ

Output Cap Core Temp

t_{oc_core}

°C

ⓘ

Inductor2 Power

P_ind2

ⓘ

Inductor2 Core Temp

t_{ind2_core}

°C

ⓘ

Total Loss

P_{total_loss}

ⓘ

Calculated Efficiency

η_calc

ⓘ

Graphs

Graph Type

graph_type

ⓘ

Graph Options

graph_opts

ⓘ

Icosalogic Inverter Design Tool

Configurations

Basics

Battery

Bus Configuration

DC Link Capacitor

FET

Gate Driver

Output Filter

Inductor 1

Output Capacitor

Inductor 2

Thermal

Graphs